Data operation in nanocrystal (NC) flash memories can be achieved by controlling charge transfer between NCs embedded within the gate oxide and the channel of a metal-oxide-semiconductor field-effect transistor (MOSFET) [1]. It is well known that during programming operations, the tunneling time of a single electron from the MOSFET channel into a NC is of the order of tens to hundreds of nanoseconds, depending on the tunneling oxide thickness. This time can be considered as a figure of merit of the overall device programming performances. On the other hand, the NC discharging time (erase operation) is a few order of magnitude faster. Ignoring phonon-assisted processes in the programming operation, electrons in the MOSFET channel can only tunnel into the NCs when their energies match (by means of the gate voltage) an allowed energy state in the NC.
In the erase operation, confined electrons tunnel from the NCs to the continuum density of states of the bulk substrate. Thus, the number of tunneling channels for charge erasing is much higher than for charge programming. Programming performance can be engineered by optimizing parameters such as NC shape and size, tunneling barrier thickness, and control oxide thickness[2-4]. However, the major limitation for extremely fast performances is the reduced NC density of states (DOS) in comparison with the two dimensional electron gas DOS in the MOSFET channel.
TABLE 1 depicts an illustrative comparison between the characteristic times of the optical programming (τO) and voltage-induced programming (τV) in Si/HfO2NC's. VG represents the voltage for which the given EF is produced across the NC. Positive (negative) quantities represent the electrons (holes) programming. τV data were taken from a previous work using devices with exactly the same NC characteristics of the one investigated in this work [5].